TMUX Scheme

Background Information

The Time Multiplexor (TMUX) scheme combines hit information from 12 RPC channels into a single high-speed serial data stream that is read by a LeCroy 1877 pipelined TDC. The readout deadtime for the 12-channel swath handled by each TMUX channel is approximately 1 us, making the approach best suited to low-to-moderate rate situations, such as the BELLE KLM system.

A sample timing diagram illustrates the basic idea. In the example shown, strips 1, 4, 8 and 11 are struck. The first edge to emerge from the circuit is a fast OR, which gives the leading edge timing of the earliest hit. Information about which of the 12 twelve strips are hit is encoded in the ensuing bit stream: basically each hit strip gives rise to a transition. The pulse train is terminated with a ``marker'' edge (the TDC clock and the clock in the TMUX are asynchronous) and a level the indicates the parity of the number of struck strips. The latter is used to verify proper system operation.

Drawings, documents, etc.